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Source note3 min read

ArchAgent v2: A Case Study with the Data Prefetching Championship

Source

arXiv

arxiv.org/abs/2608.09874v1

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Source

  • Source name: arXiv
  • Source kind: paper
  • Authors / organization: Abraham Gonzalez, Raghav Gupta, Akanksha Jain, Hanna Alam, Alexander Novikov, Po-Sen Huang, Matej Balog, Marvin Eisenberger, Sergey Shirobokov, Ngân Vũ, Hank Levy, Borivoje Nikolić, Sagar Karandikar, Martin Dixon, Parthasarathy Ranganathan
  • Venue: arXiv: cs.AI
  • Published: 2026-08-10
  • Collected: 2026-08-11
  • URL: http://arxiv.org/abs/2608.09874v1
  • PDF: https://arxiv.org/pdf/2608.09874v1
  • DOI: UNKNOWN
  • Registry group: academic_apis_and_preprints
  • Evidence role: canonical_academic_index
  • Language: en
  • Country / region: UNKNOWN

Plain-Language Brief

In a study published in 2026, researchers presented ArchAgent v2, a framework that automates the search for multi-level data prefetching in computer microarchitecture. The new version of ArchAgent outperformed hand-designed solutions in the Data Prefetching Championship, providing a 3.8% geometric mean IPC speedup overall and a 4.6% performance speedup on low-bandwidth single-core configurations compared to the previous champion. However, the evolution of multi-core designs is still a challenge due to simulation latency.

What the Document Says

  • The paper presents ArchAgent v2, a framework for automating microarchitecture search in computer systems.
  • ArchAgent v2 is designed to scale to multi-level data prefetching, where the design space and degrees of freedom are larger compared to single-level cache replacement policies.
  • Two new additions were introduced to ArchAgent: cascaded evolutionary search and a hardware-realizability feedback loop.
  • The cascaded evolutionary search subdivides the design space by sequentially evolving and freezing prefetchers at individual cache levels.
  • The hardware-realizability feedback loop embeds real-time size-estimation into the evolution process.
  • ArchAgent v2 was evaluated in the 4th Data Prefetching Championship (DPC4), where it automatically designed a three-level prefetcher that outperformed the winning hand-designed solution.
  • The discovered policy achieved a 3.8% geometric mean IPC speedup over the baseline and a 0.3% improvement over the previous champion, BertiGO.
  • On low-bandwidth single-core configurations, the policy provided a 4.6% performance speedup compared to only 2.6% for BertiGO.
  • However, multi-core evolution remains a challenge due to simulation latency impeding evolution speed.
  • The study profiles an ArchAgent evolution of over 12,000 candidate designs, providing insights into how automated evolutionary agents explore and synthesize complex microarchitectural logic.

Key Concepts Mentioned

  • ArchAgent v2
  • microarchitecture search
  • data prefetching
  • cascade evolutionary search
  • hardware-realizability feedback loop
  • 4th Data Prefetching Championship (DPC4)
  • IPC speedup

Claims Made by the Document

  • ArchAgent v2 outperforms hand-designed solutions in the Data Prefetching Championship.
  • The discovered policy provides a 3.8% geometric mean IPC speedup over the baseline.

Evidence Used

  • ArchAgent v2 automatically designs a three-level prefetcher that outperforms the winning hand-designed solution
  • The discovered policy achieves a 3.8% geometric mean IPC speedup over the baseline overall

Methods / Approach

UNKNOWN

Limitations Stated by the Authors

UNKNOWN

Limitations Noted by the Agent

Agent interpretation — not from the source.

UNKNOWN

Open Questions

UNKNOWN

Notes for Future Q&A

May include interpretation. Labeled where it does.

UNKNOWN

Raw Abstract / Excerpt

Agentic artificial intelligence has shown great promise in automating algorithm design, but scaling similar techniques to computer microarchitecture discovery remains challenging due to vast search spaces, strict hardware budgets, and long simulation times. In this work, we present ArchAgent v2, a framework which scales automated microarchitecture search to multi-level data prefetching. While the original ArchAgent successfully discovered single-level cache replacement policies in competition settings, it does not scale to multi-level prefetching where the design space and degrees of freedom are larger. To overcome this, we introduce two new additions to ArchAgent: a cascaded evolutionary search that subdivides the design space by sequentially evolving and freezing prefetchers at individual cache levels, and a hardware-realizability feedback loop that embeds real-time size-estimation directly into the evolution process. Evaluated under identical rules of the 4th Data Prefetching Championship (DPC4), ArchAgent v2 automatically designs a three-level prefetcher that outperforms the winning hand-designed solution, further demonstrating automated agentic discovery as a useful tool for computer architects. Our discovered policy achieves a 3.8% geometric mean IPC speedup over the baseline overall and a 0.3% improvement over the prior champion, BertiGO. On low-bandwidth single-core configurations, our policy yields a 4.6% performance speedup compared to only 2.6% for BertiGO. However, multi-core evolution still remains a significant challenge due to simulation latency impeding evolution speed. Finally, our profiling of an ArchAgent evolution of over 12,000 candidate designs provides key insights into how automated evolutionary agents explore and synthesize complex microarchitectural logic.